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通過降低電源對電容的要求來解決MLCC短缺問題

2020-02-27 22:52:34 來源:Atsuhiko Furukawa,現場應用工程師
The worldwide supply of multilayer ceramic capacitors (MLCCs) is not keeping up with demand. This is due in no small part to increased electronic complexity of cell phones, increased sales of electric cars, and a worldwide expansion of electronic content across industries. Some smartphones have doubled MLCC usage over a few years; an electric vehicle can quadruple usage over a typical modern internal combustion engine (Figure 1). The supply shortage of MLCCs, appearing near the end of 2016, has made it especially difficult to obtain large-capacity products (several tens of µF or more) necessary for the operation of prolific power supplies used in the latest electronics. Manufacturers looking to reduce their MLCC requirements inevitably look to the capacitor requirements of power supplies—in particular, switching regulators. This places power supply designers on the front lines of mitigating the cap shortage.
在全球范圍內,多層陶瓷電容(MLCC)供不應求。很大部分原因是因為手機的電子復雜性提高、電動汽車的銷售量增加,以及全球各行各業電子內容的擴展。相比幾年前,一些智能手機的MLCC用量翻了一番;相比使用典型的現代內燃機的汽車,電動汽車的MLCC用量增加至少4倍(圖1)。MLCC從2016年底開始缺貨,這使得生產大電容值產品(幾十µF或更高)變得尤其困難,而最新電子器件采用的高能電源需要這種電容才能運行。制造工廠想要降低MLCC要求不可避免地想要從電源的電容要求著手,尤其是開關穩壓器的電容。因此,電源設計人員成為解決電容短缺問題的關鍵。


Figure 1. Increases in worldwide MLCC use in electric automobiles (a) and cell phones (b), without commensurate increases in production, have led to shortages.1
圖1.全球范圍內電動汽車(a)和手機(b)對MLCC的用量增加,但生產量沒有相應增加,導致MLCC缺貨。1


Power Circuits Use Capacitors, A Lot of Capacitors

電源電路使用電容——大量電容

A typical dc-to-dc buck converter uses the following capacitors (see Figure 2):
典型的直流-直流降壓變換器使用下列電容(參見圖2):
- Output capacitor: Smooths out both output voltage ripple and supply load current during load transients. Generally, a large capacitor measuring several tens of μF to 100 μF is used.

- 輸出電容:在負載瞬態響應期間,平緩輸出電壓波紋和電源負載電流。一般使用幾十μF到100 μF的大電容。

- Input capacitor: In addition to stabilizing the input voltage, it plays the role of instantaneously supplying the input current. In general, several μF to several tens of μF are used.
- 輸入電容:除了穩定輸入電壓之外,它還被用于輸入電流的即時供應。一般在幾μF到幾十μF之間。

-Bypass capacitor: Absorbs noise generated by switching operation and noise from other circuits. 0.01 μF to 0.1 μF are generally used.
- 旁路電容:吸收開關操作產生的噪聲和來自其他電路的噪聲。一般在0.01 μF到0.1 μF之間。

- Compensation capacitor: It secures the phase margin in the feedback loop and prevents oscillation. Several hundreds of pF or several tens of nF are often used. Some switching regulator ICs incorporate the compensation capacitor.
補償電容:保證反饋回路中的相位裕量并防止振蕩。通常為幾百pF或幾十nF。有些開關穩壓器IC中采用了補償電容。

The best way to reduce capacitance is to focus on minimizing the output capacitors. A strategy for reducing output capacitance is explored next, followed by solutions to reducing bypass capacitor requirements and, to some extent, input capacitors.
降低電容的最好方法是想辦法最小化輸出電容的數量。本文接下來將介紹減少輸入電容的策略方法,然后介紹降低旁路電容要求,以及,在一定程度上,減少輸入電容的解決方案。
 
Figure 2. Capacitors used in a typical buck regulator.
圖2.典型降壓穩壓器使用的電容。


Increase Switching Frequency to Reduce Output Capacitance

增加開關頻率,以降低輸出電容

Figure 3a shows a typical current-mode buck converter block diagram, with the shaded area denoting the feedback loop and the compensation circuit.
圖3a顯示的是典型的電流模式降壓變換器的框圖,下部電路區域表示反饋回路和補償電路。

The characteristic of the feedback loop is shown in Figure 3b. The frequency at which the loop gain is 0 dB (gain = 1) is called the crossover frequency (fC). The higher the crossover frequency, the better the load step response of the regulator. For example, Figure 4 shows the load step response for a regulator supporting a rapid load current increase from 1 A to 5 A. The results are shown for crossover frequencies of 20 kHz and 50 kHz, resulting in 60 mV and 32 mV dropouts, respectively.
反饋回路的特性如圖3b所示。回路增益為0 dB(增益=1)時的頻率被稱為交越頻率(fC)。交越頻率越高,穩壓器的負載階躍響應性能越出色。例如,圖4顯示的是支持負載電流從1A快速增加到5A的穩壓器的負載階躍響應。所示結果對應的交越頻率為20 kHz和50 kHz,分別導致60 mV和32 mV壓降。
 
Figure 3. Block diagram of a typical buck regulator (a) and typical feedback characteristic (b).
圖3.典型降壓穩壓器(a)的框圖和典型的反饋特性(b)。
 
Figure 4. Comparing the load step responses of a buck regulator at two crossover frequencies.
圖4.比較采用兩種交越頻率時,降壓穩壓器的負載階躍響應。
 
On the surface, increasing the crossover frequency looks like an easy choice: load step response is improved by minimizing the output voltage drop, so the output capacitor can be reduced. Raising the crossover frequency, though, brings up two issues. First, it is necessary to secure a sufficient phase margin of the feedback loop to prevent oscillation. Generally, a phase margin of 45° or more (preferably 60° or more) is required at the crossover frequency.
從表面上看,提高交越頻率似乎是個簡單方法:可以通過最小化輸出壓降來改善負載階躍響應,從而減少輸出電容數量。但是,提高交越頻率會導致兩個問題。第一,需要保證反饋回路具備足夠的相位裕量,以防止振蕩。一般來說,采用該交越頻率時,需要45°或更高(最好是60°或以上)的相位裕量。

The other issue is the relationship between switching frequency (fSW) and fc. If they are similar in magnitude, negative feedback can respond to the output voltage ripple, threatening stable operation. As a guideline, set the crossover frequency to one-fifth (or less) of the switching frequency, as shown in Figure 5.
第二,需要注意開關頻率(fSW)和fc之間的關系。如果它們的幅度相當,負反饋會響應輸出電壓波紋,從而影響到穩定運行。作為一項指導,可以將交越頻率設置為開關頻率的1/5(或更低),如圖5所示。
 
Figure 5. If the switching frequency and control loop crossover frequency are too close, the negative feedback may respond to output voltage ripple. It is best to keep the crossover frequency below one-fifth of the switching frequency.
圖5.如果開關頻率和控制回路交越頻率太過接近,負反饋可能響應輸出電壓波紋。最好是讓交越頻率低于開關頻率1/5。

To increase the crossover frequency, you must also raise the switching frequency, which in turn results in higher switching losses via the top and bottom FETs, reducing conversion efficiency and generating additional heat. Any savings in capacitance is offset by the complexity of additional heat mitigation components: fins, fans, or additional board space.
要增加交越頻率,需要同時增加開關頻率,但是,這會導致頂部和底部FET的開關損耗增加,會降低轉換效率和產生更多熱量。在電容上實現的節省會因為增加散熱元件帶來的復雜性抵消:比如鰭狀散熱器、風扇或額外的板空間。
Is it possible to maintain high efficiency at high frequency operation? The answer is yes. A number of Power by Linear™ regulator ICs from Analog Devices do just that by incorporating a unique FET control that keeps efficiency high even at higher switching frequencies (Figure 6).
是否能夠在高頻率下保持高效率?答案是肯定的。使用ADI公司提供的Power by Linear™穩壓器IC就可以達到這種效果,這些穩壓器IC采用獨特的FET控制功能,在更高開關頻率下也能保持高效率(圖6)。

For example, the LT8640S 6 A output buck regulator maintains greater than 90% efficiency over its full load range (0.5 A to 6 A) while operating at a frequency of 2 MHz (12 V input and 5 V output).
例如,LT8640S 6 A輸出降壓穩壓器在操作頻率為2 MHz時(12V輸入和5V輸出),在整個負載范圍內(0.5 A至6 A)能保持高于90%的效率。

This regulator also lowers the capacitance requirements by reducing inductor current ripple (ΔIL), which in turn reduces the output ripple voltage (ΔVOUT) as shown in Figure 7. Likewise, a much smaller inductor can be used.
這個穩壓器也可以通過減少電流波紋(ΔIL)來降低電容要求,從而降低輸出波紋電壓(ΔVOUT),如圖7所示。或者,使用更小的電感。
With a higher switching frequency, the crossover frequency can be increased, improving load step response and load regulation, as shown in Figure 8.
開關頻率更高時,可以增加交越頻率,以改善負載階躍響應和負載調整,如圖8所示。
 
Figure 6. Power by Linear regulators vs. competition. In a typical regulator, when the switching frequency goes up, efficiency goes down. ADI Power by Linear regulators can maintain high efficiency at very high operating frequencies, enabling the use of smaller value output capacitors.
6.Power by Linear穩壓器與競爭產品。對于典型的穩壓器開關頻率增高時效率會下降。ADIPower by Linear穩壓器可以在非常高的操作頻率下保持高效率因而支持使用值更小的輸出電容。

 
Figure 7. Increase switching frequencies to reduce capacitor and inductor size.
圖7.通過增加開關頻率來減小電容和電感的尺寸。


 
Figure 8. Increased switching frequency results in improved load step response.
圖8.增加開關頻率可以改善負載階躍響應。

 

Silent Switcher Regulators Significantly Reduce Bypass Capacitance

Silent Switcher穩壓器可以大幅降低旁路電容

How about reducing bypass capacitance? The main role of the bypass capacitor is to absorb the noise generated by switching operation itself. If switching noise is reduced in other ways, the number of bypass capacitors can be reduced. A particularly easy way to achieve this is through the use of a Silent Switcher® regulator.
如果減少旁路電容的數量,會如何?旁路電容主要被用于吸收開關操作產生的噪聲。如果能從其他方面降低開關噪聲,就可以減少旁路電容的數量。有一個特別簡單的方法可以實現這種效果,即使用Silent Switcher®穩壓器。

How does a Silent Switcher regulator reduce switching noise? A switching regulator has two current loops: when the top FET is on and the bottom FET is off (red loop) and when the top FET is off and the bottom FET is on (blue loop) as shown in Figure 9. The hot loop carries a fully switched ac current—that is, switched from zero to IPEAK and back to zero. It has the highest ac and EMI energy, as it produces the strongest changing magnetic field.
Silent Switcher穩壓器如何降低開關噪聲?開關穩壓器具有兩個電流回路:頂部FET開啟,底部FET關閉(紅色回路);頂部FET關閉,底部FET開啟(藍色回路),如圖9所示。熱回路傳輸完全開關的交流電流,也就是說,從0切換到IPEAK,然后回到0。它具備最高的交流和EMI能源,會產生最強變化的磁場。

 
 
Figure 9. The hot loop in a switching regulator produces the bulk of the radiated noise because of the alternating magnetic field it generates.
圖9.開關穩壓器中的熱回路會因為本身產生的交變磁場而導致大量輻射噪聲。


Slew-rate control can be used to suppress switching noise by slowing the rate of change of the gate signals (lowering di/dt). While effective in suppressing the noise, this increases switching losses, producing additional heat, especially at high switching frequencies as previously described. Slew-rate control is effective under certain conditions and Analog Devices also offers solutions with this feature.
可以使用壓擺率控制來降低柵級信號變化的頻率(降低di/dt),以便抑制開關噪聲。這種方法雖然能夠抑制噪聲,但會增加開關損耗,導致產生更多熱量,在之前所述的高開關頻率下尤其如此。壓擺率控制在某些條件下是有效的,ADI公司也提供包含這種控制的解決方案。

Silent Switcher regulators suppress electromagnetic noise generated from the hot loop without slew-rate control. Rather it splits the VIN pin in two, allowing the hot loop to be split into two symmetrical hot loops. The resulting magnetic field is confined to the area near the IC, and significantly reduced elsewhere, thus minimizing radiated switching noise (Figure 10).
Silent Switcher穩壓器可以抑制熱回路中產生的電磁噪聲,但不是使用壓擺率控制。而是將VIN引腳一分為二,令熱回路可以分成兩個對稱的熱回路。產生的磁場被限制在靠近IC的區域,其他位置大幅降低,從而最大限度地降低輻射開關噪聲(圖10)。
 

 
Figure 10. Patented Silent Switcher technology.
10.獲得專利的Silent Switcher技術。


The LT8640S, the second generation of this technology—Silent Switcher 2 (Figure 11)—incorporates the input capacitors in the IC. This ensures maximum noise suppression, eliminating the need to carefully position the input caps in the layout. This feature, of course, also reduces the MLCC requirements. Another feature, spread spectrum frequency modulation, lowers noise peaks by dynamically changing the switching frequency. The combination of these features enables the LT8640S to clear CISPR 25 Class 5 EMC standards for automobiles with ease (Figure 12).
LT8640S是Silent Switcher技術的第二代,即Silent Switcher 2(圖11),IC內部集成高頻輸入電容。這可以確保最大限度地抑制噪聲,因此也無需如以前一樣非常小心地在布局中確定輸入電容的位置。毫無疑問,這也會降低對MLCC的要求。另一項功能——展頻,會通過動態改變開關頻率來降低噪聲峰值。LT8640S兼具這些功能,因此能夠輕松滿足CISPR 25 5級EMC汽車標準(圖12)。

 
 
Figure 11. Silent Switcher 2 technology from ADI brings the input caps within the IC, simplifying layout and improving noise suppression.
11.ADI公司提供的Silent Switcher 2技術在IC集成輸入電容由此簡化布局和提升噪聲抑制性能。
 
Figure 12. The combination of noise suppression features in a Silent Switcher 2 device, such as the LT8640S, enables easy clearance of CISPR 25 Class 5 peak limits even while reducing input and bypass capacitance.
12.Silent Switcher 2器件例如LT8640S)中采用這些降噪功能使得產品能夠輕松滿足CISPR 25 5級峰值限值標準甚至降低輸入和旁路電容。
 

Conclusion

結論

Power by Linear devices from ADI can help reduce MLCC requirements, helping designers ride through the MLCC shortage. Output capacitance requirements are reduced by using high frequency operation while maintaining uncommonly high efficiency. Devices that feature Silent Switcher architecture significantly suppress EMI noise, reducing bypass capacitor requirements. Silent Switcher 2 devices further reduce MLCC needs.
ADI公司提供的Power by Linear器件有助于降低MLCC要求,從而幫助設計人員解決MLCC短缺問題。可以通過使用高頻率操作來降低輸出電容要求,同時保持出色的高效率。采用Silent Switcher架構的器件可以大幅抑制EMI噪聲,從而降低旁路電容要求。Silent Switcher 2器件進一步降低了對MLCC的需求。

 

參考資料

1 Robin Blackwell. “Investor Presentation February 2018.” KEMET, February 2018.
1 Robin Blackwell。“投資演示,2018年2月。”KEMET,2018年2月。
LT8640S Data Sheet. Analog Devices, Inc., June 2017.
LT8640S數據手冊。ADI公司,2017年6月。
Seago, John. “OPTI-LOOP Architecture Reduces Output Capacitance and Improves Transient Response.” Analog Devices, Inc., August 2007.
Seago, John。“OPTI-LOOP架構降低了輸出電容,改善了瞬態響應。”ADI公司,2007年8月。
Zhang, Henry J. “Modeling and Loop Compensation Design of Switching Mode Power Supplies.” Analog Devices, Inc., February 2016.
Zhang, Henry J. “開關模式電源的模型和回路補償設計。”ADI公司,2016年2月。


作者簡介

Atsuhiko Furukawa于2006年加入凌力爾特(現在已成為ADI公司的一部分)。10多年以來,他一直為中小型客戶提供多種應用技術支持。2017年,他被調到汽車部門,現在主要負責設計大型(幾kW)和小型安全汽車應用。Atsuhiko是一名馬拉松長跑健將,取得的最好成績是3小時3分鐘。
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